Strained-semiconductor-on-insulator device structures with elevated source/drain regions
US7420201B2 · kind B2 · utility
77Cited by
313References
25Claims
0Family size
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Key dates
| Filing date | May 10, 2005 |
| Grant date | Sep 2, 2008 |
| Priority date | — |
| Expiry date | May 10, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/62
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.