Isolation process and structure for CMOS imagers
US7432121B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 2005 |
| Grant date | Oct 7, 2008 |
| Priority date | — |
| Expiry date | Dec 21, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/807
Abstract
A barrier implanted region of a first conductivity type formed in lieu of an isolation region of a pixel sensor cell that provides physical and electrical isolation of photosensitive elements of adjacent pixel sensor cells of a CMOS imager. The barrier implanted region comprises a first region having a first width and a second region having a second width greater than the first width, the second region being located below the first region. The first region is laterally spaced from doped regions of a second conductivity type of adjacent photodiodes of pixel sensor cells of a CMOS imager.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.