Method of forming a through-substrate interconnect
US7432582B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 14, 2004 |
| Grant date | Oct 7, 2008 |
| Priority date | — |
| Expiry date | Sep 5, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/09518
- WIPO fieldTextile and paper machines
- WIPO sectorMechanical engineering
Abstract
A method of manufacturing a microelectronics device is provided, wherein the microelectronics device is formed on a substrate having a frontside and a backside. The method comprises forming a circuit element on the frontside of the substrate from a plurality of layers deposited on the frontside of the substrate, wherein the plurality of layers includes an intermediate electrical contact layer, and forming an interconnect structure after forming the electrical contact layer. The interconnect structure includes a contact pad formed on the backside of the substrate, and a through-substrate interconnect in electrical communication with the contact pad, wherein the through-substrate interconnect extends from the backside of the substrate to the electrical contact layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.