Method for improving mask layout and fabrication
US7434197B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 28, 2005 |
| Grant date | Oct 7, 2008 |
| Priority date | — |
| Expiry date | Feb 19, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/705
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A hot spot is identified within a mask layout design. The hot spot represents a local region of the mask layout design having one or more feature geometries susceptible to producing one or more fabrication deficiencies. A test structure is generated for the identified hot spot. The test structure is defined to emulate the one or more feature geometries susceptible to producing the one or more fabrication deficiencies. The test structure is fabricated on a test wafer using specified fabrication processes. The as-fabricated test structure is examined to identify one or more adjustments to either the feature geometries of the hot spot of the mask layout design or the specified fabrication processes, wherein the identified adjustments are capable of reducing the fabrication deficiencies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.