Patent · US Active

Mask-programmable logic macro and method for programming a logic macro

US7439765B2 · kind B2 · utility

0Cited by
6References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 19, 2006
Grant dateOct 21, 2008
Priority date
Expiry dateAug 30, 2026

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A mask-programmable logic macro includes at least three input terminals an output terminal and a first set of transistors comprised of at least three transistors formed on a semiconductor substrate, each of the transistors comprising a controllable path and a control terminal. The controllable paths can be connected in series with one another between a first supply terminal and the output terminal by metallizing first metallization regions. The the transistors of the first set of transistors are arranged on the semiconductor substrate in such a way that at least one controllable path of the transistors can be bridged by metallizing one of the first metallization regions. A respective of the input terminals can be connected to a respective of the control terminals by metallizing a second metallization region.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.