Method for making a semiconductor device comprising a superlattice dielectric interface layer
US7446002B2 · kind B2 · utility
115Cited by
43References
21Claims
0Family size
Assignee
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Key dates
| Filing date | May 25, 2005 |
| Grant date | Nov 4, 2008 |
| Priority date | — |
| Expiry date | Jan 22, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0167
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A method for making a semiconductor device may include forming a superlattice comprising a plurality of stacked groups of layers adjacent a substrate. Each group of layers of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may further include forming a high-K dielectric layer on the electrode layer, and forming an electrode layer on the high-K dielectric layer and opposite the superlattice.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.