Random access memory including circuit to compress comparison results
US7457177B2 · kind B2 · utility
3Cited by
7References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2005 |
| Grant date | Nov 25, 2008 |
| Priority date | — |
| Expiry date | Nov 13, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/40
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A random access memory including an array of memory cells configured to store memory cell data, a first circuit, and a second circuit. The first circuit is configured to compare test data and memory cell data to obtain comparison results. The second circuit is configured to compress the comparison results and store the compressed comparison results.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.