Trimming of analog voltages in flash memory devices
US7457178B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 12, 2006 |
| Grant date | Nov 25, 2008 |
| Priority date | — |
| Expiry date | Aug 6, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A flash memory device of the multi-level cell (MLC) type, in which control gate voltages in read and programming operations and a bandgap reference voltage source are trimmable from external terminals, is disclosed. In a special test mode, control gate voltages can be applied to a selected programmed memory cell so that the threshold voltage of the cell can be sensed. A digital-to-analog converter (DAC) use for programming and a second read/verify DAC apply varying analog voltages and are sequentially used to verify the programming of an associated set of memory cells in this special test mode, with the DAC input values that provide the closest result selected for use in normal operation. These DAC's are dependent on the value of a reference source that my also be trimmed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.