Method for fabricating a semiconductor component

US7459365B2 · kind B2 · utility

Assignee

• Infineon Technologies Austria AG · AT

Inventors

• Michael Rüb · Faak am See, AT
• Herbert Schafer · Höhenkirchen-Siegertsbrunn, DE
• Armin Willmeroth · Friedberg, DE
• Anton Mauder · Kolbermoor, DE
• Stefan Sedlmaier · Munich, DE
• Roland Rupp · Achern, DE
• Manfred Pippan · Barrie Path, AT
• Hans Weber · Villach, AT
• Frank Pfirsch · Birkenfeld, DE
• Franz Hirler · Isen, DE
• Hans-Joachim Schulze · Taufkirchen, DE

Key dates

• Filing date: Sep 29, 2006
• Grant date: Dec 2, 2008
• Expiry date: May 22, 2027

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/822
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

The fabrication of a semiconductor component having a semiconductor body in which is arranged a very thin dielectric layer having sections which run in the vertical direction and which extend very deeply into the semiconductor body is disclosed. In one method a trench is formed in a drift zone region proceeding from the front side of a semiconductor body, a sacrificial layer is produced on at least a portion of the sidewalls of the trench and at least a portion of the trench is filled with a semiconductor material which is chosen such that the quotient of the net dopant charge of the semiconductor material in the trench and the total area of the sacrificial layer on the sidewalls of the trench between the semiconductor material and the drift zone region is less than the breakdown charge of the semiconductor material, and the sacrificial layer is replaced with a dielectric.