Process for finFET spacer formation
US7476578B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 12, 2007 |
| Grant date | Jan 13, 2009 |
| Priority date | — |
| Expiry date | Jul 12, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/62
Abstract
A process for finFET spacer formation generally includes depositing, in order, a conformal liner material, a conformal spacer material, and a conformal capping material onto the finFET structure; tilt implanting dopant ions into portions of the capping layer about the gate structure; selectively removing undoped capping material about the source and drain regions; selectively removing exposed portions of the spacer material; selectively removing exposed portions of the capping material; anisotropically removing a portion of the spacer material so as to expose a top surface of the gate material and isolate the spacer material to sidewalls of the gate structure; and removing the oxide liner from the fin to form the spacer on the finFET structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.