MRAM cell structure and method of fabrication
US7476919B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | May 5, 2006 |
| Grant date | Jan 13, 2009 |
| Priority date | — |
| Expiry date | Aug 26, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/01
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An MRAM structure is disclosed where the distance from a bit line or word line to an underlying free layer in an MTJ is small and well controlled. As a result, the bit line or word line switching current is reduced and tightly distributed for better device performance. A key feature in the method of forming the MRAM cell structure is a two step planarization of an insulation layer deposited on the MTJ array. A CMP step flattens the insulation layer at a distance about 60 to 200 Angstroms above the cap layer in the MTJ. Then an etch back step thins the insulation layer to a level about 50 to 190 Angstroms below the top of the cap layer. Less than 5 Angstroms of the cap layer is removed. The distance variation from the free layer to an overlying bit line or word line is within +/−5 Angstroms.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.