Patent · US Active

Method for fabricating fine pattern in semiconductor device

US7494599B2 · kind B2 · utility

1Cited by
2References
24Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 30, 2007
Grant dateFeb 24, 2009
Priority date—
Expiry dateApr 30, 2027

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY10T428/2826
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method for forming a fine pattern in a semiconductor device includes forming a first polymer layer over an etch target layer, the first polymer layer including a carbon-rich polymer layer, forming a second polymer layer over the first polymer layer, the second polymer layer including a silicon-rich polymer layer, patterning the second polymer layer, oxidizing surfaces of the patterned second polymer layer, etching the first polymer layer using the patterned second polymer layer comprising the oxidized surfaces, and etching the etch target layer using the patterned second polymer layer comprising the oxidized surfaces and the etched first polymer layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.