Integrated circuit memory having a read circuit
US7499344B2 · kind B2 · utility
4Cited by
9References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 5, 2006 |
| Grant date | Mar 3, 2009 |
| Priority date | — |
| Expiry date | Sep 23, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5645
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory includes a resistive memory cell and a circuit configured to provide an output signal indicating a state of the memory cell based on a comparison of a voltage across the memory cell to a threshold voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.