Pulsed bias having high pulse frequency for filling gaps with dielectric material
US7514375B1 · kind B1 · utility
530Cited by
7References
27Claims
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Key dates
| Filing date | Aug 8, 2006 |
| Grant date | Apr 7, 2009 |
| Priority date | — |
| Expiry date | Mar 9, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02274
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
During bottom filling of high aspect ratio gaps and trenches in an integrated circuit substrate using HDP-CVD, a pulsed HF bias is applied to the substrate. In some embodiments, pulsed HF bias is applied to the substrate during etching operations. The pulsed bias typically has a pulse frequency in a range of about from 500 Hz to 20 kHz and a duty cycle in a range of about from 0.1 to 0.95.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.