Method for making an electronic device including a poled superlattice having a net electrical dipole moment

US7517702B2 · kind B2 · utility

Assignee

• MEARS TECHNOLOGIES, INC. · US

Inventors

• Samed Halilov · Waltham, US
• Xiangyang Huang · Waltham, US
• Ilija Dukovski · Newton, US
• Jean Augustin Chan Sow Fook Yiptong · Milton, US
• Robert J. Mears · Wellesley, US
• Marek Hytha · Brookline, US
• Robert John Stephenson · Duxford, GB

Key dates

• Filing date: Dec 21, 2006
• Grant date: Apr 14, 2009
• Expiry date: Oct 15, 2027

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N30/852
• WIPO field: Micro-structural and nano-technology
• WIPO sector: Chemistry

Abstract

A method for making an electronic device may include forming a poled superlattice comprising a plurality of stacked groups of layers and having a net electrical dipole moment. Each group of layers of the poled superlattice may include a plurality of stacked semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer thereon. The at least one non-semiconductor monolayer may be constrained within a crystal lattice of adjacent base semiconductor portions, and at least some semiconductor atoms from opposing base semiconductor portions may be chemically bound together through the at least one non-semiconductor monolayer therebetween. The method may further include coupling at least one electrode to the poled superlattice.