Nanocrystal non-volatile memory cell and method therefor
US7517747B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 8, 2006 |
| Grant date | Apr 14, 2009 |
| Priority date | — |
| Expiry date | Feb 10, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S977/773
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A method of forming a semiconductor device includes forming a first dielectric layer over a semiconductor substrate, forming a plurality of discrete storage elements over the first dielectric layer, thermally oxidizing the plurality of discrete storage elements to form a second dielectrics over the plurality of discrete storage elements, and forming a gate electrode over the second dielectric layer, wherein a significant portion of the gate electrode is between pairs of the plurality of discrete storage elements. In one embodiment, portions of the gate electrode is in the spaces between the discrete storage elements and extends to more than half of the depth of the spaces.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.