Methods of forming semiconductor constructions
US7517754B2 · kind B2 · utility
33Cited by
1References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 9, 2008 |
| Grant date | Apr 14, 2009 |
| Priority date | — |
| Expiry date | Jan 9, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/716
Abstract
The invention includes methods of forming semiconductor constructions in which electrically conductive structures are formed between bitlines to electrically connect with storage node contacts. The bitlines can be formed within trenches having faceted top portions. The invention also includes semiconductor structures containing trenches with faceted top portions, and containing bitlines within the trenches.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.