Process integration scheme to lower overall dielectric constant in BEoL interconnect structures
US7521358B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 2, 2007 |
| Grant date | Apr 21, 2009 |
| Priority date | — |
| Expiry date | Oct 11, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Back-End of Line (BEoL) interconnect structures, and methods for their manufacture, are provided. The structures are characterized by narrower conductive lines and reduced overall dielectric constant values. Conformal diffusion barrier layers, and selectively formed capping layers, are used to isolate the conductive lines and vias from surrounding dielectric layers in the interconnect structures. The methods of the invention employ techniques to narrow the openings in photoresist masks in order to define narrower vias. More narrow vias increase the amount of misalignment that can be tolerated between the vias and the conductive lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.