Processor and method of grouping and executing dependent instructions in a packet
US7523295B2 · kind B2 · utility
4Cited by
12References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 21, 2005 |
| Grant date | Apr 21, 2009 |
| Priority date | — |
| Expiry date | Apr 17, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3853
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An interleaved multithreading pipeline operating method comprises reading an instruction packet containing at least two instructions, steering a first instruction of the instruction packet to a first execution unit for execution and generating a first result, steering a second instruction of the instruction packet to a second execution unit for execution using the first result and generating a second result, and storing the second result.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.