Utilizing sidewall spacer features to form magnetic tunnel junctions in an integrated circuit

US7531367B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Solomon Assefa · Ossining, US
• Michael C. Gaidis · Yorktown Heights, US
• Sivananda K. Kanakasabapathy · Niskayuna, US
• John P. Hummel · Millbrook, US
• David W. Abraham · New York, US

Key dates

• Filing date: Jan 18, 2006
• Grant date: May 12, 2009
• Expiry date: Apr 12, 2027

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B61/00

Abstract

Novel methods for reliably and reproducibly forming magnetic tunnel junctions in integrated circuits are described. In accordance with aspects of the invention, sidewall spacer features are utilized during the processing of the film stack. Advantageously, these sidewall spacer features create a tapered masking feature which helps to avoid byproduct redeposition during the etching of the MTJ film stack, thereby improving process yield. Moreover, the sidewall spacer features may be used as encapsulating layers during subsequent processing steps and as vertical contacts to higher levels of metallization.