Patent · US Active

Method of fabricating a release substrate

US7544265B2 · kind B2 · utility

0Cited by

5References

20Claims

0Family size

Assignee

S.O.I. TEC SILICON ON INSULATOR TECHNOLOGIES · FR

Inventors

Olivier Rayssac · Grenoble, FR
Takeshi Akatsu · Meylan, FR

Key dates

Filing date	Jul 5, 2006
Grant date	Jun 9, 2009
Priority date	—
Expiry date	Feb 24, 2027

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY10S117/915
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

The invention relates to a method of fabricating a release substrate produced from semiconductor materials, the method comprising creating a reversible connection between two substrate release layers characterized in that the reversible connection is formed by a connecting layer produced using a first material as the basis, the connecting layer further comprising a nanoparticle concentrating zone of a second material disposed to facilitate release of the substrate, the first and second materials being selected to maintain the bonding energy of the reversible connection substantially constant even when the substrate is exposed to heat treatment.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.