Patent · US Active

Techniques for patterning features in semiconductor devices

US7545041B2 · kind B2 · utility

3Cited by

10References

1Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Scott D. Allen · Ledgewood, US
Katherina Babich · Chappaqua, US
Steven J. Holmes · Colchester, US
Arpan Mahorowala · West Linn, US
Dirk Pfeiffer · Dobbs Ferry, US
Richard Wise · Los Gatos, US

Key dates

Filing date	Jan 23, 2006
Grant date	Jun 9, 2009
Priority date	—
Expiry date	Mar 20, 2027

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY10T428/24926
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Techniques for semiconductor processing are provided. In one aspect, a method for patterning one or more features in a semiconductor device comprises the following step. At least one critical dimension of the one or more features is reduced during etching of the antireflective material. A lithographic structure is also provided.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.