Method and apparatus for providing void structures
US7566656B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2006 |
| Grant date | Jul 28, 2009 |
| Priority date | — |
| Expiry date | Jan 19, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/1063
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention relates to integrated circuits. In particular, but not exclusively, the invention relates to a method and apparatus for connecting elements of integrated circuits with interconnects having one or more voids formed between adjacent interconnects. Embodiments of the invention provide apparatus for connecting elements in an integrated circuit device, comprising: at least one interconnect comprising one or more sidewalls; an interconnect sidewall spacer element arranged to provide structural support to the interconnect and formed on at least one of the interconnect sidewalls; and at least one void adjacent said interconnect and extending from the sidewall spacer element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.