Method for manufacturing a semiconductor device having improved across chip implant uniformity
US7569464B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2006 |
| Grant date | Aug 4, 2009 |
| Priority date | — |
| Expiry date | Jul 10, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0184
Abstract
The present invention provides a method for manufacturing a semiconductor device, which includes forming a gate structure over a substrate, and forming a stack of layers on the substrate and at least partially along a sidewall of the gate structure. In this embodiment, the stack of layers includes an initial layer located over the substrate, a buffer layer located over the initial layer and an offset layer located over the buffer layer. This embodiment of the method further includes removing horizontal segments of the offset layer and the buffer layer using a dry etch and a wet clean, wherein removing includes choosing at least one of an initial thickness of the buffer layer, a period of time for the dry etch or a period of time for the wet clean such that horizontal segments of the initial layer are exposed and substantially unaffected after the dry etch and wet clean.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.