Memory circuit including a resistive memory element and method for operating such a memory circuit
US7599209B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2005 |
| Grant date | Oct 6, 2009 |
| Priority date | — |
| Expiry date | Jan 29, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a memory circuit and method of operating the same. In at least one embodiment, the memory circuit includes a resistive memory element coupled to a plate potential by a first terminal; a bit line which is connectable to a second terminal of the resistive memory element; a programming circuit operable to change the resistance of the resistive memory element; a bleeder circuit operable to provide a bleeding current to or from the bit line due to a change of the resistance of the resistive memory element caused by the programming circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.