Retention margin program verification
US7616499B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 28, 2006 |
| Grant date | Nov 10, 2009 |
| Priority date | — |
| Expiry date | Dec 28, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5621
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Data verification in a memory device using a portion of a data retention margin is provided. A bit count is read from the region to determine whether errors will result in the memory. A read in one or more retention margin portions is performed after the normal program verify sequence and if the number of bits in these regions is more than a pre-set the memory will fail verify status. A method of verifying data in a memory device includes the steps of: defining an retention margin between adjacent data thresholds; programming the memory device with data; determining whether bits are present in the data retention margin; and if the number of bits in the retention margin exceeds a threshold, generating an error.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.