Program-verify method with different read and verify pass-through voltages
US7619931B2 · kind B2 · utility
6Cited by
29References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 26, 2007 |
| Grant date | Nov 17, 2009 |
| Priority date | — |
| Expiry date | Jul 18, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3459
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and devices are disclosed, such methods comprising applying a verify pass-through voltage to unselected select lines of the floating-gate memory array that is greater than a read pass-through voltage applied to the unselected select lines. Other methods involve utilizing a cell current for reading a value from one or more memory cells in program-verify operations that is lower than a cell current for reading value from one or more memory cells in read operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.