Multi-resistive state memory device with conductive oxide electrodes

US7633790B2 · kind B2 · utility

Assignee

• UNITY SEMICONDUCTOR · US

Inventors

• Darrel Rinerson · Cupertino, US
• Wayne Kinney · Emmett, US
• Edmond R. Ward · Monte Sereno, US
• Steve Kuo-Ren Hsia · San Jose, US
• Steven W. Longcor · Mountain View, US
• Christophe J. Chevallier · Palo Alto, US
• John Sanchez · Palo Alto, US
• Philip Swab · Santa Rosa, US

Key dates

• Filing date: Oct 1, 2008
• Grant date: Dec 15, 2009
• Expiry date: Oct 1, 2028

Classification

• Technology area (CPC G): Physics
• CPC primary: G11C2213/79
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A memory cell including conductive oxide electrodes is disclosed. The memory cell includes a memory element operative to store data as a plurality of resistive states. The memory element includes a layer of a conductive metal oxide (CMO) (e.g., a perovskite) in contact with an electrode that may comprise one or more layers of material. At least one of those layers of material can be a conductive oxide (e.g., a perovskite such as LaSrCoO3—LSCoO or LaNiO3—LNO) that is in contact with the CMO. The conductive oxide layer can be selected as a seed layer operative to provide a good lattice match with and/or a lower crystallization temperature for the CMO. The conductive oxide layer may also be in contact with a metal layer (e.g., Pt). The memory cell additionally exhibits non-linear IV characteristics, which can be favorable in certain arrays, such as non-volatile two-terminal cross-point memory arrays.