Inventor · Palo Alto, CA, US

John Sanchez

37Patents
14h-index
30Co-inventors
81Inventor score

Filing activity: Jul 10, 1995 → Mar 8, 2021

Most-cited inventions

PatentTitleAreaCited byStatus
US6972985B2 Memory element having islands Physics 46 Expired
US7326979B2 Resistive memory device with a treated interface Physics 37 Expired
US6723635B1 Protection low-k ILD during damascene processing with thin liner Electricity 30 Expired
US7082052B2 Multi-resistive state element with reactive metal Physics 28 Expired
US5597458A Method for producing alloy films using cold sputter deposition process Electricity 26 Expired
US6657304B1 Conformal barrier liner in an integrated circuit interconnect Electricity 26 Expired
US6525428B1 Graded low-k middle-etch stop layer for dual-inlaid patterning Emerging Cross-Sectional Technologies 25 Expired
US6989604B1 Conformal barrier liner in an integrated circuit interconnect Electricity 21 Expired
US6822437B1 Interconnect test structure with slotted feeder lines to prevent stress-induced voids Electricity 20 Expired
US6836017B2 Protection of low-k ILD during damascene processing with thin liner Electricity 18 Expired
US7633790B2 Multi-resistive state memory device with conductive oxide electrodes Physics 18 Active
US7394679B2 Multi-resistive state element with reactive metal Physics 17 Active
US7889539B2 Multi-resistive state memory device with conductive oxide electrodes Physics 16 Active
US8062942B2 Method for fabricating multi-resistive state memory devices Physics 15 Active
US9570515B2 Memory element with a reactive metal layer Physics 11 Active
US8675389B2 Memory element with a reactive metal layer Physics 11 Active
US9159408B2 Memory element with a reactive metal layer Physics 11 Active
US6727592B1 Copper interconnect with improved barrier layer Electricity 10 Expired
US9806130B2 Memory element with a reactive metal layer Physics 10 Active
US10340312B2 Memory element with a reactive metal layer Physics 5 Active
US6869878B1 Method of forming a selective barrier layer using a sacrificial layer Electricity 4 Expired
US7026225B1 Semiconductor component and method for precluding stress-induced void formation in the semiconductor component Electricity 4 Expired
US9252359B2 Resistive switching devices having a switching layer and an intermediate electrode layer and methods of formation thereof Electricity 4 Active
US9159913B2 Two-terminal reversibly switchable memory device Physics 3 Active
US10224480B2 Two-terminal reversibly switchable memory device Physics 2 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.