Patent · US Active

Method of fabricating a high Q factor integrated circuit inductor

US7638406B2 · kind B2 · utility

8Cited by
22References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 28, 2005
Grant dateDec 29, 2009
Priority date
Expiry dateJan 5, 2027

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/30107
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method of forming an inductor. The method includes: forming a dielectric layer on a substrate; forming a lower trench in the dielectric layer; forming a liner in the lower trench and on the dielectric layer; forming a Cu seed layer over the liner; forming a resist layer on the Cu seed layer; forming an upper trench in the resist layer; electroplating Cu to completely fill the lower trench and at least partially fill the upper trench; removing the resist layer; selectively forming a passivation layer on all exposed Cu surfaces; selectively removing the Cu seed layer from regions of the liner; and removing the thus exposed regions of the liner from the dielectric layer, wherein a top surface of the inductor extends above a top surface of the dielectric layer, the passivation layer remaining on regions of sidewalls of the inductor above the top surface of the dielectric layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.