Inventor · Yorktown Heights, NY, US

John Harold Magerlein

33Patents
13h-index
59Co-inventors
80Inventor score

Filing activity: Dec 19, 1997 → Dec 7, 2012

Most-cited inventions

PatentTitleAreaCited byStatus
US7990711B1 Double-face heat removal of vertically integrated chip-stacks utilizing combined symmetric silicon carrier fluid cavity and micro-channel cold plate Electricity 98 Active
US7190580B2 Apparatus and methods for microchannel cooling of semiconductor integrated circuit packages Electricity 63 Expired
US6593644B2 System of a package fabricated on a semiconductor or dielectric wafer with wiring on one face, vias extending through the wafer, and external connections on the opposing face Electricity 58 Expired
US7139172B2 Apparatus and methods for microchannel cooling of semiconductor integrated circuit packages Electricity 55 Expired
US7928562B2 Segmentation of a die stack for 3D packaging thermal management Electricity 49 Active
US7808781B2 Apparatus and methods for high-performance liquid cooling of multiple chips with disparate cooling requirements Electricity 32 Active
US7202764B2 Noble metal contacts for micro-electromechanical switches Emerging Cross-Sectional Technologies 31 Expired
US8110415B2 Silicon based microchannel cooling and electrical package Electricity 27 Active
US6819000B2 High density area array solder microjoining interconnect structure and fabrication method Electricity 22 Expired
US7518229B2 Versatile Si-based packaging with integrated passive components for mmWave applications Electricity 21 Active
US7808798B2 Versatile Si-based packaging with integrated passive components for mmWave applications Electricity 21 Active
US6774482B2 Chip cooling Electricity 20 Expired
US8115303B2 Semiconductor package structures having liquid coolers integrated with first level chip package modules Electricity 18 Active
US7189595B2 Method of manufacture of silicon based package and devices manufactured thereby Electricity 10 Expired
US8772927B2 Semiconductor package structures having liquid cooler integrated with first level chip package modules Electricity 9 Active
US6661098B2 High density area array solder microjoining interconnect structure and fabrication method Electricity 9 Expired
US7473102B2 Space transforming land grid array interposers Electricity 9 Expired
US6732908B2 High density raised stud microjoining system and methods of fabricating the same Electricity 8 Expired
US7638406B2 Method of fabricating a high Q factor integrated circuit inductor Electricity 8 Active
US7068138B2 High Q factor integrated circuit inductor Electricity 8 Expired
US8581392B2 Silicon based microchannel cooling and electrical package Electricity 7 Active
US7855442B2 Silicon based package Electricity 7 Active
US7581314B2 Method of forming noble metal contacts Emerging Cross-Sectional Technologies 5 Active
US8097492B2 Method and manufacture of silicon based package and devices manufactured thereby Electricity 5 Active
US6747472B2 Temporary device attach structure for test and burn in of microjoint interconnects and method for fabricating the same Electricity 4 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.