Semiconductor and semiconductor manufacturing arrangements having a chalcogenide layer formed of columnar crystal grains perpendicular to a main substrate surface
US7638786B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 15, 2005 |
| Grant date | Dec 29, 2009 |
| Priority date | — |
| Expiry date | Nov 15, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8828
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
The annealing process at 400° C. or more required for the wiring process for a phase change memory has posed the problem in that the crystal grains in a chalcogenide material grow in an oblique direction to cause voids in a storage layer. The voids, in turn, cause peeling due to a decrease in adhesion, variations in resistance due to improper contact with a plug, and other undesirable events. After the chalcogenide material has been formed in an amorphous phase, post-annealing is conducted to form a (111)-oriented and columnarly structured face-centered cubic. This is further followed by high-temperature annealing to form a columnar, hexagonal closest-packed crystal. Use of this procedure makes it possible to suppress the growth of inclined crystal grains that causes voids, since crystal grains are formed in a direction perpendicular to the surface of an associated substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.