Transistor gate electrode having conductor material layer

US7642610B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Anand S. Murthy · Beaverton, US
• Boyan Boyanov · Portland, US
• Suman Datta · Beaverton, US
• Brian S. Doyle · Portland, US
• Been-Yih Jin · Lake Oswego, US
• Shaofeng Yu · Plano, US
• Robert S. Chau · Beaverton, US

Key dates

• Filing date: Mar 8, 2007
• Grant date: Jan 5, 2010
• Expiry date: Apr 17, 2027

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/038

Abstract

Various embodiments of the invention relate to a PMOS device having a transistor channel of silicon germanium material on a substrate, a gate dielectric having a dielectric constant greater than that of silicon dioxide on the channel, a gate electrode conductor material having a work function in a range between a valence energy band edge and a conductor energy band edge for silicon on the gate dielectric, and a gate electrode semiconductor material on the gate electrode conductor material.