LDMOS with channel stress

US7645651B2 · kind B2 · utility

Assignee

• Freeescale Semiconductor, Inc. · US

Inventors

• Xiaoqiu Huang · Plano, US
• Veeraraghavan Dhandapani · Round Rock, US
• Bich-Yen Nguyen · Austin, US
• Amanda M. Kroll · Pflugerville, US
• Daniel T. Pham · Clifton Park, US

Key dates

• Filing date: Dec 6, 2007
• Grant date: Jan 12, 2010
• Expiry date: Jul 7, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/832

Abstract

A method of forming a metal oxide semiconductor (MOS) device comprises defining an active area in an unstrained semiconductor layer structure, depositing a hard mask overlying the active area and a region outside of the active area, patterning the hard mask to expose the active area, selectively growing a strained semiconductor layer overlying the exposed active area, and forming a remainder of the MOS device. The active area includes a first doped region of first conductivity type and a second doped region of second conductivity type. The strained semiconductor layer provides a biaxially strained channel for the MOS device. During a portion of forming the remainder of the MOS device, dopant of the first conductivity type of the first doped region of the active area and dopant of the second conductivity type of the second doped region of the active area diffuses into overlying portions of the strained semiconductor layer to create a correspondingly doped strained semiconductor layer, thereby providing corresponding doping for the biaxially strained channel.