Address translation for input/output (I/O) devices and interrupt remapping for I/O devices in an I/O memory management unit (IOMMU)
US7653803B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 16, 2007 |
| Grant date | Jan 26, 2010 |
| Priority date | — |
| Expiry date | Apr 6, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/652
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In an embodiment, an input/output (I/O) memory management unit (IOMMU) comprises at least one memory configured to store translation data; and control logic coupled to the memory and configured to translate an I/O device-generated memory request using the translation data. The translation data corresponds to one or more device table entries in a device table stored in a memory system of a computer system that includes the IOMMU, wherein the device table entry for a given request is selected by an identifier corresponding to the I/O device that generates the request. The translation data further corresponds to one or more I/O page tables, wherein the selected device table entry for the given request includes a pointer to a set of I/O page tables to be used to translate the given request.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.