Configuration of high-voltage semiconductor power device to achieve three dimensional charge coupling
US7670908B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 22, 2007 |
| Grant date | Mar 2, 2010 |
| Priority date | — |
| Expiry date | May 19, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D12/441
Abstract
This invention discloses semiconductor device that includes a top region and a bottom region with an intermediate region disposed between said top region and said bottom region with a controllable current path traversing through the intermediate region. The semiconductor device further includes a trench with padded with insulation layer on sidewalls extended from the top region through the intermediate region toward the bottom region wherein the trench includes randomly and substantially uniformly distributed nano-nodules as charge-islands in contact with a drain region below the trench for electrically coupling with the intermediate region for continuously and uniformly distributing a voltage drop through the current path.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.