Integrated circuit memory system employing silicon rich layers

US7675104B2 · kind B2 · utility

Assignees

• Spansion LLC. · US
• Advanced Micro Devices, Inc. · US

Inventors

• Amol Joshi · Sunnyvale, US
• Harpreet Sachar · Milpitas, US
• Youseok Suh · Cupertino, US
• Shenqing Fang · Fremont, US
• Chih-Yuh Yang · San Jose, US
• Lovejeet Singh · Sunnyvale, US
• David Matsumoto · San Jose, US
• Hidehiko Shiraiwa · San Jose, US
• Kuo-Tung Chang · Saratoga, US
• Scott A. Bell · San Jose, US
• Allison Holbrook · San Jose, US
• Satoshi Torii · Sunnyvale, US

Key dates

• Filing date: Jul 31, 2006
• Grant date: Mar 9, 2010
• Expiry date: Jan 3, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/0413
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

An integrated circuit memory system that includes: providing a substrate; forming a silicon rich charge storage layer over the substrate; forming a first isolation trench through the silicon rich charge storage layer in a first direction; and forming a second isolation trench through the silicon rich charge storage layer in a second direction.