Method of producing a transistor

US7678635B2 · kind B2 · utility

Assignee

• COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES · FR

Inventors

• Laurent Clavelier · Grenoble, FR
• Frédéric Mayer · Hoover, US
• Maud Vinet · Voiron, FR
• Simon Deleonibus · Le Pont-de-Claix, FR

Key dates

• Filing date: Feb 13, 2008
• Grant date: Mar 16, 2010
• Expiry date: Sep 4, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/60
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Method of producing a transistor, comprising in particular the steps of: producing a first etching mask on a gate layer, one edge of the first mask forming a pattern of the first edge of a gate of the transistor, etching the gate layer according to the first etching mask, first ion implantation in a part of the substrate not covered by the gate layer, trimming the first etching mask over a length equal to a gate length of the transistor, producing a second etching mask on the gate layer, removing the first etching mask etching the gate layer according to the second etching mask, second ion implantation in another part of the substrate.