Patent · US Active

Programmable logic device with multiple slice types

US7696784B1 · kind B1 · utility

1Cited by

14References

6Claims

0Family size

Assignee

Lattice Semiconductor Corporation · US

Inventors

Om P. Agrawal · Los Altos, US
Xiaojie He · Austin, US
Sajitha Wijesuriya · Macungie, US
Barry Britton · Orefield, US
Ming H. Ding · San Jose, US
Jun Zhao · Mianyang, CN

Key dates

Filing date	Apr 18, 2008
Grant date	Apr 13, 2010
Priority date	—
Expiry date	Apr 18, 2028

Classification

Technology area (CPC H)Electricity
CPC primaryH03K19/17728
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

In one embodiment, a programmable logic device includes a plurality of programmable logic blocks and a plurality of slices within each of the programmable logic blocks. At least one programmable logic blocks includes a first slice not adapted to provide register functionality or RAM functionality, a second slice adapted to provide register functionality but not RAM functionality, and a third slice adapted to provide register functionality and RAM functionality. Control logic within the programmable logic block is adapted to provide control signals at the programmable block level and at the slice level.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.