Dynamic metrology schemes and sampling schemes for advanced process control in semiconductor processing
US7698012B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 1, 2002 |
| Grant date | Apr 13, 2010 |
| Priority date | — |
| Expiry date | Sep 21, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P90/80
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
Systems, methods and mediums are provided for dynamic adjustment of sampling plans in connection with a wafer (or other device) to be measured. A sampling plan provides information on specific measure points within a die, a die being the section on the wafer that will eventually become a single chip after processing. There are specified points within the die that are candidates for measuring. The stored die map information may be retrieved and translated to determine the available points for measurement on the wafer.The invention adjusts the frequency and/or spatial resolution of measurements when one or more events occur that are likely to indicate an internal or external change affecting the manufacturing process or results. The increase in measurements and possible corresponding decrease in processing occur on an as-needed basis. The dynamic metrology plan adjusts the spatial resolution of sampling within-wafer by adding, subtracting or replacing candidate points from the sampling plan, in response to certain events which suggest that additional or different measurements of the wafer may be desirable. Where there are provided a number of candidate points in the die map in the ar…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.