Method for making a semiconductor device comprising a lattice matching layer
US7700447B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 21, 2007 |
| Grant date | Apr 20, 2010 |
| Priority date | — |
| Expiry date | Oct 30, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8162
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for making a semiconductor device which may include forming a first monocrystalline layer comprising a first material having a first lattice constant, a second monocrystalline layer including a second material having a second lattice constant different than the first lattice constant, and a lattice matching layer between the first and second monocrystalline layers and comprising a superlattice. More particularly, the superlattice may include a plurality of groups of layers, and each group of layers may include a plurality of stacked semiconductor monolayers defining a semiconductor base portion and at least one non-semiconductor monolayer thereon. Furthermore, the at least one non-semiconductor monolayer may be constrained within a crystal lattice of adjacent base semiconductor portions, and at least some semiconductor atoms from opposing base semiconductor portions may be chemically bound together through the at least one non-semiconductor monolayer therebetween.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.