Current constricting phase change memory element structure
US7745807B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 11, 2007 |
| Grant date | Jun 29, 2010 |
| Priority date | — |
| Expiry date | Jan 14, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/884
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A layer of nanoparticles having a dimension on the order of 10 nm is employed to form a current constricting layer or as a hardmask for forming a current constricting layer from an underlying insulator layer. The nanoparticles are preferably self-aligning and/or self-planarizing on the underlying surface. The current constricting layer may be formed within a bottom conductive plate, within a phase change material layer, within a top conductive plate, or within a tapered liner between a tapered via sidewall and a via plug contains either a phase change material or a top conductive material. The current density of the local structure around the current constricting layer is higher than the surrounding area, thus allowing local temperature to rise higher than surrounding material. The total current required to program the phase change memory device, and consequently the size of a programming transistor, is reduced due to the current constricting layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.