Method and apparatus for creating a Spacer-Optimization (S-O) library
US7765077B2 · kind B2 · utility
8Cited by
1References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 21, 2007 |
| Grant date | Jul 27, 2010 |
| Priority date | — |
| Expiry date | Jan 14, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention can provide a method of processing a substrate using Spacer-Optimization (S-O) processing sequences and evaluation libraries that can include one or more optimized spacer creation and evaluation procedures. In addition, the S-O processing sequences can include one or more deposition procedures, one or more partial-etch procedures, one or more chemical oxide removal (COR)-etch procedures, one or more optimization procedures, one or more evaluation procedures, and/or one or more verification procedures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.