Method of and circuit for protecting a transistor formed on a die
US7772093B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 26, 2007 |
| Grant date | Aug 10, 2010 |
| Priority date | — |
| Expiry date | Mar 6, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/601
Abstract
A method of protecting a transistor formed on a die of an integrated circuit is disclosed. The method comprises forming an active region of the transistor on the die; forming a gate of the transistor over the active region; coupling a primary contact to the gate of the transistor; coupling a programmable element between the gate of the transistor and a protection element; and decoupling the protection element from the gate of the transistor by way of the programmable element. Circuits for protecting a transistor formed on a die of an integrated circuit are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.