Integration of a sense FET into a discrete power MOSFET
US7799646B2 · kind B2 · utility
14Cited by
5References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 7, 2008 |
| Grant date | Sep 21, 2010 |
| Priority date | — |
| Expiry date | Jul 3, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/127
Abstract
A semiconductor device includes a main field effect transistor (FET) and one or more sense FETs, and a common gate pad. The main FET and the one or more sense FETs are formed in a common substrate. The main FET and each of the sense FETs include a source terminal, a gate terminal and a drain terminal. The common gate pad connects the gate terminals of the main FET and the one or more sense FETs. An electrical isolation is disposed between the gate terminals of the main FET and the one or more sense FETs. Embodiments of this invention may be applied to both N-channel and P-channel MOSFET devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.