Transistor having a locally provided metal silicide region in contact areas and a method of forming the transistor
US7799682B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 9, 2007 |
| Grant date | Sep 21, 2010 |
| Priority date | — |
| Expiry date | May 2, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0137
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
By performing a silicidation process on the basis of a patterned dielectric layer, such as an interlayer dielectric material, the respective metal silicide portions may be provided in a highly localized manner at the respective contact regions, while the overall amount of metal silicide may be significantly reduced. In this way, a negative influence of the stress of metal silicide on the channel regions of field effect transistors may be significantly reduced, while nevertheless maintaining a low contact resistance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.