Unity beta ratio tri-gate transistor static random access memory (SRAM)

US7825437B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Ravi Pillarisetty · Portland, US
• Suman Datta · Beaverton, US
• Jack T. Kavalieros · Portland, US
• Brian S. Doyle · Portland, US
• Uday Shah · Portland, US

Key dates

• Filing date: Dec 28, 2007
• Grant date: Nov 2, 2010
• Expiry date: Mar 10, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B10/00

Abstract

In general, in one aspect, a method includes forming N-diffusion and P-diffusion fins in a semiconductor substrate. A P-diffusion gate layer is formed over the semiconductor substrate and removed from the N-diffusion fins. A pass-gate N-diffusion gate layer is formed over the semiconductor substrate and removed from the P-diffusion fins and pull-down N-diffusion fins. A pull-down N-diffusion layer is formed over the semiconductor substrate.