Method and structure for dispensing chip underfill through an opening in the chip
US7838336B2 · kind B2 · utility
9Cited by
1References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 24, 2007 |
| Grant date | Nov 23, 2010 |
| Priority date | — |
| Expiry date | Mar 15, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of making an integrated circuit package includes forming a through hole in an integrated circuit and assembling a die containing the integrated circuit on a carrier so that the die is mechanically and electrically connected to the carrier. Thereafter, an underfill material is dispensed between the die and the carrier via the through hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.