Fabrication of a CMOS structure with a high-k dielectric layer oxidizing an aluminum layer in PFET region

US7863126B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Dae-Gyu Park · Seojong-myeon, KR
• Michael P. Chudzik · Beacon, US
• Vijay Narayanan · New York, US
• Vamsi K. Paruchuri · New York, US

Key dates

• Filing date: May 15, 2008
• Grant date: Jan 4, 2011
• Expiry date: Apr 2, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/62

Abstract

A method for fabricating a CMOS structure is disclosed. The method includes the blanket disposition of a high-k gate insulator layer in an NFET device and in a PFET device, and the implementation of a gate metal layer over the NFET device. This is followed by a blanket disposition of an Al layer over both the NFET device and the PFET device. The method further involves a blanket disposition of a shared gate metal layer over the Al layer. When the PFET device is exposed to a thermal annealing, the high-k dielectric oxidizes the Al layer, thereby turning the Al layer into a PFET interfacial control layer, while in the NFET device the Al becomes a region of the metal gate.