Technique for compensating for a difference in deposition behavior in an interlayer dielectric material

US7875514B2 · kind B2 · utility

Assignee

• Advanced Micro Devices, Inc. · US

Inventors

• Ralf Richter · Dresden, DE
• Robert Seidel · Dresden, DE
• Carsten Peters · Dresden, DE

Key dates

• Filing date: Jul 22, 2010
• Grant date: Jan 25, 2011
• Expiry date: Jul 22, 2030

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0167
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

By selectively providing a buffer layer having an appropriate thickness, height differences occurring during the deposition of an SACVD silicon dioxide may be reduced during the formation of an interlayer dielectric stack of advanced semiconductor devices. The buffer material may be selectively provided after the deposition of contact etch stop layers of both types of internal stress or may be provided after the deposition of one type of dielectric material and may be used during the subsequent patterning of the other type of dielectric stop material as an efficient etch stop layer.